Layer 3 supervisor module, Layer 3 supervisor module -3 – Lucent Technologies P550 User Manual
Page 23
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Cajun P550 Switch Overview
Cajun P550/P220 Switch Operation Guide
1-3
Layer 3 Supervisor Module
The Layer 3 supervisor module features include:
❒ PowerPC 750 (RISC) processor
❒ Memory: 4 MB Flash, 64 MB DRAM, 128 KB NVRAM, 512 KB cache, with
multiple memory configurations:
❒ Real-time clock
❒ Out-of-band console: 10/100Base-T & RS-232
❒ RMON support
❒ Simple Network Management Protocol (SNMP) management agent
❒ Dot matrix display
The supervisor module is responsible for address learning, address cache management,
and spanning tree management.
In addition, the Layer 3 supervisor module:
❒ Implements system management functions and management interfaces.
❒ Uses standard routing protocols and maintains routing table and caches.
❒ Provides 1.5 million packets per second of hardware-based routing for packets that
arrive on Layer 2-only media modules.
❒ Supplies software-based routing for packets that are not routed in hardware.
❒ Supports implementation of AppleTalk, and DECnet, that are not implemented in
hardware.
The Layer 3 supervisor module requires a faster CPU and more memory. Also unlike the
Layer 2 supervisor, the Layer 3 supervisor is part of the path that some packets take
through the system. To accomplish this, the Layer 3 supervisor requires faster data
transfer to and from the switching fabric.
Table 1-1. Multiple Memory Configuration
DIMM/SIMM
Number of
Modules
Total Memory
32 MB
1
32 MB
32 MB
2
64 MB
64 MB
1
64 MB (V3.0 or higher)
64 MB
2
128 MB (V3.0 or higher)