beautypg.com

IBM uPD78082 User Manual

Page 55

background image

32

CHAPTER 3 CPU ARCHITECTURE

Figure 3-6. Data Memory Addressing (

µ

PD78P083)

General Registers

32

×

8 bits

Internal PROM

24576

×

8 bits

Unusable

Internal High-speed RAM

512

×

8 bits

Special Function

Registers (SFRs)

256

×

8 bits

SFR Addressing

Register Addressing

Short Direct
Addressing

Direct Addressing

Register Indirect
Addressing

Based Addressing

Based Indexed
Addressing

F F 2 0 H
F F 1 F H

F F 0 0 H
FEFFH

FEE0H
FEDFH

F E 2 0 H
FE1FH

FD00H
FCFFH

6 0 0 0 H
5 F F F H

FFFFH

0 0 0 0 H

This manual is related to the following products: