IBM uPD78082 - Manual (Page 122)

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CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
Figure 6-17. PWM Output Operation Timings (CRn0 changing, active high setting)
Caution
If CRn0 is changed during TMn operation, the value changed is not reflected until TMn overflows.
Remark
n = 5, 6
Count Clock
TMn Count Value
CRn0 TCEn
INTTMn
TOn
OVFn
Active Level
Inactive Level
00
FF
N+2
N+1
N
02
01
00
FF
N
N
01
02
MM
M+2
M+1
M
M+3
00
Active Level
Inactive Level
CRn0 Changing
(N
→
M)