IBM uPD78082 - Manual (Page 50)

27
CHAPTER 3 CPU ARCHITECTURE
Figure 3-3. Memory Map (
µ
PD78P083)
Data memory
space
General Registers
32 × 8 bits
Internal PROM
24576
×
8 bits
CALLF Entry Area
CALLT Table Area
Vector Table Area
Program Area
Program Area
Unusable
Program
memory
space
Internal High-speed RAM
512 × 8 bits
Special Function
Registers (SFRs)
256
×
8 bits
F F 0 0 H
FEFFH
FEE0H
FEDFH
FD00H
FCFFH
6 0 0 0 H
5 F F F H
FFFFH
1 0 0 0 H
0 F F F H
0 8 0 0 H
0 7 F F H
0 0 8 0 H
0 0 7 F H
0 0 4 0 H
0 0 3 F H
5 F F F H
0 0 0 0 H 0 0 0 0 H