IBM uPD78082 - Manual (Page 123)

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CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
6.5 Cautions on 8-Bit Timer/Event Counters 5 and 6
(1) Timer start errors
An error with a maximum of one clock may occur concerning the time required for a match signal to be gener-
ated after timer start. This is because 8-bit timer registers 5 and 6 (TM5 and TM6) are started asynchronously
with the count pulse.
Figure 6-18. 8-Bit Timer Registers 5 and 6 Start Timing
Count Pulse
TM5, TM6 Count Value 00H 01H 02H 03H 04H
Timer Start
TI5, TI6, Input
CR50, CR60
TM5, TM6 Count Value
TO5, TO6
Interrupt Request Flag
00H
00H 00H 00H 00H
(2) 8-bit compare register 50 and 60 setting
The 8-bit compare registers 50 and 60 (CR50 and CR60) can be set to 00H.
Thus, when these 8-bit compare registers are used as event counters, one-pulse count operation can be
carried out.
Figure 6-19. External Event Counter Operation Timing