Echelon FT 3150 Smart Transceiver User Manual
Page 32

Chapter 2 - Hardware Resources
26
FT 3120 / FT 3150 Smart Transceiver Data Book
System RAM Setup 2.7 ms
Communication Port Initialization 0 ms
Checksum Initialization 10.8 ms
One-Second Timer Initialization 0.61 ms
Scheduler Initialization 0.74 ms
Total 53.7 ms
Table 2.9 FT 3150 Smart Transceiver Reset Sequence Time
Notes:
Note 1) E is the number of non-zero bytes being written (ranges from 10 to 504).
Note 2) R is the number of off-chip RAM bytes.
Note 3) R
a
is the number of non-system off-chip RAM bytes.
Note 4) B is the number of application and/or network buffers allocated.
Note 5) These tasks run in parallel with other tasks.
Note 6) M is the number of bytes to be checksummed.
Note 7) Only if booting to the configured or unconfigured state; if booting to the applicationless state, use the “no boot” equation.
Note 8) Assumes a trivial initialization task, no reset task, and the configured state.
For example, the timing of each of these steps is shown for a FT 3150 Smart Transceiver application with the
following parameters: 10MHz input clock, crystal oscillator, no boot required, 16K external RAM, test and clear
external RAM, at least 10 application and/or network buffers, and 500 bytes of EEPROM checksummed.
Stack Initialization and BIST 42.5 ms
SERVICE Pin Initialization 0.1 ms
State Initialization 0.13 ms
Off-Chip RAM Initialization 353 ms
Random Number Seed Calculation 5 ms
System RAM Setup 4.2 ms
Communication Port Initialization 0 ms
Checksum Initialization 12.5 ms
One-Second Timer Initialization 0.61 ms
Scheduler Initialization 0.74 ms
Total 418 ms
Use the following compiler directive to disable testing of off-chip RAM:
# pragma ram_test_off
Step
Number of CLK1 Cycles
Notes
Stack Initialization and BIST
425,000
SERVICE Pin Initialization
1000
State Initialization
1300 (for no boot)
70,000 + 25 ms*E (for boot)
1
Off-Chip RAM Initialization
24,000 + 214*R (for test and clear)
24,000 + 152*R
a
(for clear only)
2
3
Random Number Seed Calculation
50,000 max
System RAM Setup
27,000 + 1500*B
4
Communication Port Initialization
0
5
Checksum Initialization
7200 + 175*M (for no boot)
82,000 + 100 ms + 175*M (for boot)
6, 7
One-Second Timer Initialization
6100
Scheduler Initialization
≥ 7400
8