Reset processes and timing – Echelon FT 3150 Smart Transceiver User Manual
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Chapter 2 - Hardware Resources
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FT 3120 / FT 3150 Smart Transceiver Data Book
Reset Processes and Timing
During the reset period, the I/O pins are in a high-impedance state. The FT 3150 Smart Transceiver address lines A15
– A0 are forced to 0xFFFF, R/W is forced to 0, and E is forced to 1. The data lines are undetermined but driven high
or low, so they will not float and draw excess current. The SERVICE pin is high impedance during reset. Reset
overrides the effect of E clock on data lines in that, in normal operations the data bus is only driven in a write cycle
during the E clock low portion of the bus cycle, while reset forces the data bus to be driven. The steps followed in
preparing the FT Smart Transceiver to execute the application code are discussed below. These steps are summarized
in Figure 2.11.
After the RESET pin is released, the FT Smart Transceiver performs hardware and firmware initialization before
executing application programs. These tasks are:
•
Oscillator start-up
•
Oscillator stabilization
•
Stack initialization and built-in self-test (BIST)
•
SERVICE pin initialization
•
State initialization