Rainbow Electronics DS2154 - Manual (Page 44)

DS2154
031197 44/69
A TNAF.5 Remote Alarm (used to transmit the alarm).
Sa4 TNAF.4 Additional Bit 4.
Sa5 TNAF.3 Additional Bit 5.
Sa6 TNAF.2 Additional Bit 6.
Sa7 TNAF.1 Additional Bit 7.
Sa8 TNAF.0 Additional Bit 8.
11.3 INTERNAL REGISTER SCHEME
BASED ON CRC4 MULTIFRAME
On the receive side, there is a set of eight registers
(RSiAF, RSiNAF, RRA, RSa4 to RSa8) that report the Si
and Sa bits as they are received. These registers are
updated with the setting of the Receive CRC4 Multi-
frame bit in Status Register 2 (SR2.1). The host can use
the SR2.1 bit to know when to read these registers. The
user has 2 ms to retrieve the data before it is lost. The
MSB of each register is the first received. Please see
the register descriptions below and the Transmit Data
Flow diagram in Section 13 for more details.
On the transmit side, there is also a set of eight registers
(TSiAF, TSiNAF, TRA, TSa4 to TSa8) that via the Trans-
mit Sa Bit Control Register (TSaCR), can be pro-
grammed to insert both Si and Sa data. Data is sampled
from these registers with the setting of the Transmit Mul-
tiframe bit in Status Register 2 (SR2.5). The host can
use the SR2.5 bit to know when to update these regis-
ters. It has 2 ms to update the data or else the old data
will be retransmitted. The MSB of each register is the
first bit transmitted. Please see the register descriptions
below and the Transmit Data Flow diagram in Section
13 for more details.