Rainbow Electronics DS2154 - Manual (Page 38)

DS2154
031197 38/69
TIR1/TIR2/TIR3/TIR4: TRANSMIT IDLE REGISTERS (Address=26 to 29 Hex)
[Also used for Per–Channel Loopback]
(MSB) (LSB)
CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1
CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9
CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17
CH32 CH31 CH30 CH29 CH28 CH27 CH26 CH25
SYMBOL POSITION NAME AND DESCRIPTION
CH32 TIR4.7 Transmit Idle Registers.
0=do not insert the Idle Code in the TIDR into this channel
CH1 TIR1.0 1=insert the Idle Code in the TIDR into this channel
NOTE:
If CCR3.5=1, then a zero in the TIRs implies that channel data is to be sourced from TSER and a one implies that
channel data is to be sourced from the output of the receive side framer (i.e., Per–Channel Loopback; see Figure 1–1).
TIDR: TRANSMIT IDLE DEFINITION REGISTER (Address=2A Hex)
(MSB) (LSB)
TIDR7 TIDR6 TIDR5 TIDR4 TIDR3 TIDR2 TIDR1 TIDR0
SYMBOL POSITION NAME AND DESCRIPTION
TIDR7 TIDR.7 MSB of the Idle Code (this bit is transmitted first)
TIDR0 TIDR.0 LSB of the Idle Code (this bit is transmitted last)
8.1.2 Per–Channel Code Insertion
The second method involves using the Transmit Chan-
nel Control Registers (TCC1/2/3/4) to determine which
of the 32 E1 channels should be overwritten with the
code placed in the Transmit Channel Registers (TC1 to
TC32). This method is more flexible than the first in that
it allows a different 8–bit code to be placed into each of
the 32 E1 channels.
TC1 TO TC32: TRANSMIT CHANNEL REGISTERS (Address=60 to 7F Hex)
(for brevity, only channel one is shown; see Table 1–3 for other register address)
(MSB) (LSB)
C7 C6 C5 C4 C3 C2 C0
SYMBOL POSITION NAME AND DESCRIPTION
C7 TC1.7 MSB of the Code (this bit is transmitted first)
C0 TC1.0 LSB of the Code (this bit is transmitted last)
TIR1 (26)
TIR2 (27)
TIR3 (28)
TIR4 (29)
TC1 (60)