Xilinx Virtex-5 FPGA ML561 - Manual (Page 93)

Virtex-5 FPGA ML561 User Guide www.xilinx.com 93
UG199 (v1.2.1) June 15, 2009
How to Generate a User-Specific FPGA IBIS Model R
How to Generate a User-Specific FPGA IBIS Model
The following steps indicate how to generate an IBIS model:
1. Under ISE, open your fully compiled project.
2. Go to the Tcl Shell tab, and issue an ibiswriter command as:
ibiswriter –allmodels .ncd
to 24 lowercase characters>.ibs ;
For example, ibiswriter –allmodels mem_interface_top.ncd
ml561_fpga3_u34.ibs
3. Unzip the Virtex-5 FPGA IBIS models ZIP file located at the Xilinx Download Center
(under the “Device Models” sidebar link). Then unzip the ZIP file containing the
device package files and extract a package file for your device, for example,
ff1136_5vlx50t.pkg
. Place this file in the same directory as the FPGA IBIS file (for
example, ml561_fpga3_u34.ibs).
4. Open the ml561_fpga3_u34.ibs file generated by ibiswriter in HyperLynx Visual
IBIS Editor. Check the file for correctness by clicking on the check (9) button in the top
toolbar. Warnings are okay.
5. Open the ff1136_5vlx50t.pkg file using a text editor and locate the [Define
Package Model]
line. Copy and paste this line into the ml561_fpga3_u34.ibs file
just above the line with the [Package] declaration. Edit the copied line to change
[Define Package Model]
to [Package Model].
6. Again, check the file for correctness by clicking on the check (9) button in the top
toolbar. Multiple errors will appear. The package model file defines I/O definitions for
all usable pins, but now ibiswriter only declares pins defined under the UCF. Thus
errors are displayed for all the undefined pins, for example:
ERROR - Pin 'AK9' found in Package_Model 'ff1136_xc5vlx50t_fga0106_dc' Pin_Numbers
list not found in Component 'VIRTEX-5' Pin list.
7. Copy all these errors into a text file with a .txt file type.
♦ Open this text file with Excel and provide the delimiter as (‘), which puts all the
unused pin names in one column. Delete all other columns before and after the
one with the pin names.
♦ In column 2, fill in Unused_IO for all pins.
♦ In column 3, fill in the name of one of the I/O standards defined under the
[Model] section of the ml561_fpga3_u34.ibs file, for example,
LVCMOS25_S_12. Choose a name that is not an output only standard, because it
might conflict with other outputs in the same bank.
♦ Right-justify the indentation for all three columns and make sure that each
column is wider by a few spaces than the longest string in that column.
♦ Save this file with the Save As command in Excel using the Formatted Text (space
delimited) (*.prn) option to create a text file with text columns separated by
spaces. (The IBIS checker gives a warning if the .ibs file contains tabs.)
8. Open the .prn file with a text editor and copy all these lines to the .ibs file at the end
of the [Pin] definitions section (just above the [Diff Pin] declarations).
9. Check (9) the .ibs file again. There should not be any errors. Again, warnings are
okay.
10. The result is an accurate custom-made IBIS model of a Virtex-5 device specific to your
design.