Emerson Process Management ControlWave XFC - Manual (Page 23)

CI-ControlWave XFC Introduction / 1-9
communications via a 3-wire half duplex cable. All communication ports are Tranzorb
protected to
±15KV ESD.
1.3.3.2 CPU Memory
Boot/downloader FLASH
Boot/download code is contained in a single 512 Kbyte uniform sector FLASH IC. This
device resides on the local bus, operates at 3.3V and is configured for 8-bit access. 10-
Position DIP-Switch (see Table 1-2) provides user configuration settings such as
enabling/disabling Recovery Mode, Core Updump, WINDIAG, etc. Note: Recovery Mode will
be initiated if CPU Switch SW1 positions 9 and 10 are both set ON or OFF when a reset
occurs.
FLASH Memory
The base version of the CPU Module has 8Mbytes of 3.3V, simultaneous read/write (DL)
FLASH memory. The CPU Board contains one 63-pin FBGA site that accepts an 8 Mbytes,
3.3V, (DL) FLASH IC. FLASH memory is 16-bits wide. System Firmware and the Boot
Project are stored here. No hardware write protection is provided for the FLASH array.
System Memory (SRAM)
The base version of the CPU Module has 2Mbytes of soldered-down static RAM, im-
plemented with one 1M x 16 asynchronous SRAM that is configured as a 1M x 16-bit array.
All random access memory retained data is stored in SRAM. During power loss periods,
SRAM is placed into data retention mode (powered by a backup 3.0V lithium battery).
SRAMs operate at 3.3V and are packaged in 63-pin FBGA sites. Critical system information
that must be retained during power outages or when the system has been disabled for
maintenance is stored here. Data includes: Last states of all I/O, historical data, retain
variables and pending alarm messages not yet reported. The SRAM supports 16-bit
accesses.
1.3.3.3 CPU Board Battery Enable Configuration Jumper
ControlWave XFC CPU Board is provided with 1 User Configuration Jumper that
functions to enable/disable the backup lithium battery.
• JP1 - Battery Backup Jumper: Installed = Battery Enabled
Removed/Stored = Battery Disabled
1.3.3.4 CPU Board LEDS
Two red LEDs provide for the following status conditions when lit: WD indicates a
Watchdog condition has been detected. IDLE indicates that the CPU has free time at the
end of its execution cycle. Normally, IDLE should be ON for only 2 seconds every minute,
i.e., 2 out of 60 seconds, to save power. When the Idle LED is OFF continuously, it indicates
that the CPU has no free time, and may be overloaded.
1.3.3.5 CPU Board General Purpose Configuration Switch SW1
CPU/System Controller Board; Ten-position DIP-Switch SW1 is provided for user
configuration settings. Table 1-2 provides details on SW1 settings.