Altera Stratix III Development Board User Manual
Page 55

Chapter 2: Board Components
2–47
Components and Interfaces
May 2013
Altera Corporation
Stratix III 3SL150 Development Board
Reference Manual
J8 pin 102
LVDS RX or CMOS I/O bit 8
HSMB_RX_P8
LVDS or 2.5 V
H2
J8 pin 103
LVDS TX or CMOS I/O bit 8
HSMB_TX_N8
LVDS or 2.5 V
L6
J8 pin 104
LVDS RX or CMOS I/O bit 8
HSMB_RX_N8
LVDS or 2.5 V
J1
J8 pin 107
LVDS TX or CMOS I/O bit 9
HSMB_TX_P9
LVDS or 2.5 V
L5
J8 pin 108
LVDS TX or CMOS I/O bit 9
HSMB_RX_P9
LVDS or 2.5 V
G2
J8 pin 109
LVDS RX or CMOS I/O bit 9
HSMB_TX_N9
LVDS or 2.5 V
L4
J8 pin 110
LVDS RX or CMOS I/O bit 9
HSMB_RX_N9
LVDS or 2.5 V
H1
J8 pin 113
LVDS TX or CMOS I/O bit 10
HSMB_TX_P10
LVDS or 2.5 V
K6
J8 pin 114
LVDS RX or CMOS I/O bit 10
HSMB_RX_P10
LVDS or 2.5 V
F1
J8 pin 115
LVDS TX or CMOS I/O bit 10
HSMB_TX_N10
LVDS or 2.5 V
K5
J8 pin 116
LVDS RX or CMOS I/O bit 10
HSMB_RX_N10
LVDS or 2.5 V
G1
J8 pin 119
LVDS TX or CMOS I/O bit 11
HSMB_TX_P11
LVDS or 2.5 V
J7
J8 pin 120
LVDS RX or CMOS I/O bit 11
HSMB_RX_P11
LVDS or 2.5 V
H4
J8 pin 121
LVDS TX or CMOS I/O bit 11
HSMB_TX_N11
LVDS or 2.5 V
J6
J8 pin 122
LVDS RX or CMOS I/O bit 11
HSMB_RX_N11
LVDS or 2.5 V
H3
J8 pin 125
LVDS TX or CMOS I/O bit 12
HSMB_TX_P12
LVDS or 2.5 V
H6
J8 pin 126
LVDS RX or CMOS I/O bit 12
HSMB_RX_P12
LVDS or 2.5 V
E2
J8 pin 127
LVDS TX or CMOS I/O bit 12
HSMB_TX_N12
LVDS or 2.5 V
H5
J8 pin 128
LVDS RX or CMOS I/O bit 12
HSMB_RX_N12
LVDS or 2.5 V
E1
J8 pin 131
LVDS TX or CMOS I/O bit 13
HSMB_TX_P13
LVDS or 2.5 V
K8
J8 pin 132
LVDS RX or CMOS I/O bit 13
HSMB_RX_P13
LVDS or 2.5 V
C1
J8 pin 133
LVDS TX or CMOS I/O bit 13
HSMB_TX_N13
LVDS or 2.5 V
K7
J8 pin 134
LVDS RX or CMOS I/O bit 13
HSMB_RX_N13
LVDS or 2.5 V
D1
J8 pin 137
LVDS TX or CMOS I/O bit 14
HSMB_TX_P14
LVDS or 2.5 V
L8
J8 pin 138
LVDS RX or CMOS I/O bit 14
HSMB_RX_P14
LVDS or 2.5 V
D3
J8 pin 139
LVDS TX or CMOS I/O bit 14
HSMB_TX_N14
LVDS or 2.5 V
L8
J8 pin 140
LVDS RX or CMOS I/O bit 14
HSMB_RX_N14
LVDS or 2.5 V
D2
J8 pin 143
LVDS TX or CMOS I/O bit 15
HSMB_TX_P15
LVDS or 2.5 V
M10
J8 pin 144
LVDS RX or CMOS I/O bit 15
HSMB_RX_P15
LVDS or 2.5 V
G5
J8 pin 145
LVDS TX or CMOS I/O bit 15
HSMB_TX_N15
LVDS or 2.5 V
M9
J8 pin 146
LVDS RX or CMOS I/O bit 15
HSMB_RX_N15
LVDS or 2.5 V
G4
J8 pin 149
LVDS TX or CMOS I/O bit 16
HSMB_TX_P16
LVDS or 2.5 V
N11
J8 pin 150
LVDS RX or CMOS I/O bit 16
HSMB_RX_P16
LVDS or 2.5 V
F4
J8 pin 151
LVDS TX or CMOS I/O bit 16
HSMB_TX_N16
LVDS or 2.5 V
N10
J8 pin 152
LVDS RX or CMOS I/O bit 16
HSMB_RX_N16
LVDS or 2.5 V
F3
J8 pin 155
LVDS or CMOS clock out
HSMB_CLK_OUT_P2
LVDS
R12
J8 pin 156
LVDS or CMOS clock in
HSMB_CLK_IN_P2
LVDS
U4
J8 pin 157
LVDS or CMOS clock out
HSMB_CLK_OUT_N2
2.5 V
T11
J8 pin 158
LVDS or CMOS clock in
HSMB_CLK_IN_N2
2.5 V
U3
Table 2–42. HSMC Port B Interface Signal Name, Description, and Type (Part 3 of 4)
Board
Reference
Description
Schematic
Signal Name
I/O Standard
Stratix III
Pin Number