Altera Stratix III Development Board User Manual

Page 17

Chapter 2: Board Components

2–9

MAX II CPLD

May 2013

Altera Corporation

Stratix III 3SL150 Development Board

Reference Manual

Address bus shared with flash
and P-SRAM bit 3

FSM_A3

1.8 V

F23

U9 pin D1 and U4
pin A5 and U10 pin
A5

Address bus shared with flash
and P-SRAM bit 4

FSM_A4

1.8 V

D27

U9 pin D2 and U4
pin B3 and U10 pin
B3

T10

Address bus shared with flash
and P-SRAM bit 5

FSM_A5

1.8 V

D28

U9 pin A2 and U4 pin
B4 and U10 pin B4

P13

Address bus shared with flash
and P-SRAM bit 6

FSM_A6

1.8 V

F25

U9 pin C2 and U4 pin
C3 and U10 pin C3

R10

Address bus shared with flash
and P-SRAM bit 7

FSM_A7

1.8 V

F26

U9 pin A3 and U4 pin
C4 and U10 pin C4

M10

Address bus shared with flash
and P-SRAM bit 8

FSM_A8

1.8 V

G24

U9 pin B3 and U4 pin
D4 and U10 pin D4

T11

Address bus shared with flash
and P-SRAM bit 9

FSM_A9

1.8 V

F24

U9 pin C3 and U4 pin
H2 and U10 pin H2

N10

Address bus shared with flash
and P-SRAM bit 10

FSM_A10

1.8 V

E26

U9 pin C4 and U4 pin
H3 and U10 pin H3

R11

Address bus shared with flash
and P-SRAM bit 11

FSM_A11

1.8 V

D26

U9 pin C4 and U4 pin
H4 and U10 pin H4

P10

Address bus shared with flash
and P-SRAM bit 12

FSM_A12

1.8 V

A30

U9 pi A12 and U4 pin
H5 and U10 pin H5

T12

Address bus shared with flash
and P-SRAM bit 13

FSM_A13

1.8 V

A33

U9 pin B5 and U4 pin
G3 and U10 pin G3

M11

Address bus shared with flash
and P-SRAM bit 14

FSM_A14

1.8 V

B31

U9 pin C5 and U4 pin
G4 and U10 pin G4

R12

Address bus shared with flash
and P-SRAM bit 15

FSM_A15

1.8 V

A31

U9 pin D7 and U4
pin F3 and U10 pin
F3

N11

Address bus shared with flash
and P-SRAM bit 16

FSM_A16

1.8 V

B32

U9 pin D8 and U4
pin F4 and U10 pin
F4

T13

Address bus shared with flash
and P-SRAM bit 17

FSM_A17

1.8 V

A32

U9 pin A7 and U4 pin
E4 and U10 pin E4

P11

Address bus shared with flash
and P-SRAM bit 18

FSM_A18

1.8 V

M23

U9 pin B7 and U4 pin
D3 and U10 pin D3

R13

Address bus shared with flash
and P-SRAM bit 19.

FSM_A19

1.8 V

L23

U9 pin C7 and U4 pin
H1 and U10 pin H1

M12

Address bus shared with flash
and P-SRAM bit 20

FSM_A20

1.8 V

B29

U9 pin C8 and U4 pin
G2 and U10 pin G2

R14

Address bus shared with flash
and P-SRAM bit 21

FSM_A21

1.8 V

C29

U9 pin A8 and U4 pin
H6 and U10 pin H6

N12

Address bus shared with flash
and P-SRAM bit 22

FSM_A22

1.8 V

C31

U9 pin G1

Table 2–5. MAX II Device Pin-out (Part 2 of 9)

MAX II

Pin Number

Description

Schematic Signal Name

I/O

Standard

Stratix III

Pin

Number

Other Connections