Altera Arria V GX Starter Board - Manual (Page 26)

2–18 Chapter 2: Board Components
Setup Elements
Arria V GX Starter Board November 2013 Altera Corporation
Reference Manual
Board Settings DIP Switch
The board settings DIP switch (SW4) controls various features specific to the board
and the MAX V CPLD 5M2210 System Controller logic design.
Table 2–11 lists the
switch controls and descriptions.
JTAG Chain Control DIP Switch
The JTAG chain control DIP switch (SW2) either remove or include devices in the
active JTAG chain. The Arria V GX is always in the JTAG chain.
Table 2–12 lists the
switch controls and its descriptions.
PCI Express Link Width DIP Switch
The PCI Express link width DIP switch (SW1) enable or disable different link width
configurations.
Table 2–13 lists the switch controls and descriptions.
Table 2–11. Board Settings DIP Switch Controls
Switch Schematic Signal Name Description Default
1 CLK_SEL
ON: Select SMA input clock
OFF: Select programmable oscillator clock
OFF
2 CLK_EN
ON: Disable On-board oscillator
OFF: Enable On-board oscillator
OFF
3 FACTORY_LOAD
ON: Load the user design from flash at power up.
OFF: Load the factory design from flash for Arria V at power up.
OFF
4 SECURITY Reserved for future use. OFF
Table 2–12. JTAG Chain Control Switch
Switch Schematic Signal Name Description Default
1 5M2210_JTAG_EN
ON : Bypass MAX V CPLD 5M2210 System Controller
OFF : MAX V CPLD 5M2210 System Controller in-chain
OFF
2 HSMA_JTAG_EN
ON : Bypass HSMA
OFF : HSMA in-chain
ON
3 PCIE_JTAG_EN
ON : Bypass PCI Express edge connector
OFF : PCI Express edge connector in-chain
ON
4 NC Not used ON
Table 2–13. PCI Express Link Width DIP Switch Controls (Part 1 of 2)
Switch Schematic Signal Name Description Default
1 PCIE_PRSNT2n_x1
ON : Enable x1 presence detect
OFF : Disable x1 presence detect
ON
2 PCIE_PRSNT2n_x4
ON : Enable x4 presence detect
OFF : Disable x4 presence detect
ON