Altera Stratix V GX FPGA Development Board User Manual
Page 47
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Chapter 2: Board Components
2–39
Components and Interfaces
October 2014
Altera Corporation
Stratix V GX FPGA Development Board
Reference Manual
55
HSMA_TX_D_N1
LVDS or 2.5-V
AN11
Data bus
61
HSMA_TX_D_N2
LVDS or 2.5-V
AL11
Data bus
67
HSMA_TX_D_N3
LVDS or 2.5-V
AF11
Data bus
73
HSMA_TX_D_N4
LVDS or 2.5-V
AE11
Data bus
79
HSMA_TX_D_N5
LVDS or 2.5-V
AE9
Data bus
85
HSMA_TX_D_N6
LVDS or 2.5-V
AC9
Data bus
91
HSMA_TX_D_N7
LVDS or 2.5-V
AC12
Data bus
103
HSMA_TX_D_N8
LVDS or 2.5-V
P8
Data bus
109
HSMA_TX_D_N9
LVDS or 2.5-V
N10
Data bus
115
HSMA_TX_D_N10
LVDS or 2.5-V
N9
Data bus
121
HSMA_TX_D_N11
LVDS or 2.5-V
J9
Data bus
127
HSMA_TX_D_N12
LVDS or 2.5-V
H10
Data bus
133
HSMA_TX_D_N13
LVDS or 2.5-V
D9
Data bus
139
HSMA_TX_D_N14
LVDS or 2.5-V
C10
Data bus
145
HSMA_TX_D_N15
LVDS or 2.5-V
A11
Data bus
151
HSMA_TX_D_N16
LVDS or 2.5-V
B8
Data bus
47
HSMA_TX_D_P0
LVDS or 2.5-V
AT11
Data bus
53
HSMA_TX_D_P1
LVDS or 2.5-V
AM11
Data bus
59
HSMA_TX_D_P2
LVDS or 2.5-V
AK11
Data bus
65
HSMA_TX_D_P3
LVDS or 2.5-V
AG12
Data bus
71
HSMA_TX_D_P4
LVDS or 2.5-V
AE10
Data bus
77
HSMA_TX_D_P5
LVDS or 2.5-V
AD9
Data bus
83
HSMA_TX_D_P6
LVDS or 2.5-V
AB9
Data bus
89
HSMA_TX_D_P7
LVDS or 2.5-V
AB12
Data bus
101
HSMA_TX_D_P8
LVDS or 2.5-V
R8
Data bus
107
HSMA_TX_D_P9
LVDS or 2.5-V
P10
Data bus
113
HSMA_TX_D_P10
LVDS or 2.5-V
N8
Data bus
119
HSMA_TX_D_P11
LVDS or 2.5-V
K9
Data bus
125
HSMA_TX_D_P12
LVDS or 2.5-V
J10
Data bus
131
HSMA_TX_D_P13
LVDS or 2.5-V
E9
Data bus
137
HSMA_TX_D_P14
LVDS or 2.5-V
D10
Data bus
143
HSMA_TX_D_P15
LVDS or 2.5-V
B11
Data bus
149
HSMA_TX_D_P16
LVDS or 2.5-V
A8
Data bus
Table 2–40. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 4)
Board
Reference
(J1)
Schematic Signal Name
I/O Standard
Stratix V GX FPGA
Device Pin
Number
Description