Altera Integer Arithmetic IP - Manual (Page 143)

ALTMULT_COMPLEX Ports
Table 10-2: ALTMULT_COMPLEX IP Core Input Ports
Port Name Required Description
aclr
No Asynchronous clear for the complex multiplier. When the
aclr
port is asserted high, the function is asynchronously cleared.
clock
Yes Clock input to the ALTMULT_COMPLEX function.
dataa_imag[]
Yes Imaginary input value for the data
A
port of the complex
multiplier. The size of the input port depends on the
WIDTH_A
parameter value.
dataa_real[]
Yes Real input value for the data
A
port of the complex multiplier.
The size of the input port depends on the
WIDTH_A
parameter
value.
datab_imag[]
Yes Imaginary input value for the data
B
port of the complex
multiplier. The size of the input port depends on the
WIDTH_B
parameter value.
datab_real[]
Yes Real input value for the data
B
port of the complex multiplier.
The size of the input port depends on the
WIDTH_B
parameter
value.
ena
No Active high clock enable for the clock port of the complex
multiplier.
Table 10-3: ALTMULT_COMPLEX IP Core Output Ports
Port Name Required Description
result_imag
Yes Imaginary output value of the multiplier. The size of the output
port depends on the
WIDTH_RESULT
parameter value.
result_real
Yes Real output value of the multiplier. The size of the output port
depends on the
WIDTH_RESULT
parameter value.
ALTMULT_COMPLEX Parameters
The following table lists the parameters for the ALTMULT_COMPLEX megafunction.
10-6 ALTMULT_COMPLEX Ports
UG-01063
2014.12.19
Altera Corporation ALTMULT_COMPLEX (Complex Multiplier)
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