Altera MAX 10 FPGA - Manual (Page 36)

Internal Configuration
Mode
.pof Generation and ICB
Setting Method
Description
Single Compressed
Image with Memory
Initialization.
Convert Programming
Files
• User needs to generate .pof using Convert
Programming Files.
• ICB can be set during Convert Programming
Files task.
Single Uncompressed
Image with Memory
Initialization
Dual Compressed
Images
Auto-Generated .pof
To set the ICB for the auto-generated .pof, follow these steps:
1. On the Assignments menu, click Settings. The Settings dialog box appears.
2. In the Category list, select Device. The Device page appears.
3. Click Device and Pin Options.
4. In the Device and Pin Options dialog box, select the Configuration from the category pane.
5. Click the Device Options … button.
6. The Max 10 Device Options dialog box allows you to set the following:
a. Power on Reset Scheme: Instant On, Fast POR Delay or Standard POR Delay.
b. User IOs week pull up during configuration.
c. Verify Protect.
7. Click OK once setting is completed.
.pof Generation through Convert Programming Files
To set the ICB settings and convert .sof to .pof , follow these steps:
1. On the File menu, click Convert Programming Files.
2. Under Output programming file, select Programmer Object File ( .pof ) in the Programming file
type list.
3. In the Mode list, select Internal Configuration.
4. To set the ICB settings, click Option/Boot Info and the ICB setting dialog box will appear. The ICB
setting dialog box allows you to set the following:
a. Power on Reset Scheme: Instant On, Fast POR Delay or Standard POR Delay.
b. User IOs week pull up during configuration.
c. Auto-recofigure from secondary image when initial image fails (enabled by default).
Note: When you disable this feature, the device will always load the configuration image 0 without
sampling the physical CONFIG_SEL pin. After successfully load the configuration image 0,
you can switch between configuration image using the
config_sel_overwrite
bit of the
input register. Refer to related information for details about Altera Dual Configuration IP
core input register.
d. Use secondary image ISP data as default setting when available.
e. JTAG Secure.
3-6 Auto-Generated .pof
UG-M10CONFIG
2015.05.04
Altera Corporation MAX 10 FPGA Configuration Design Guidelines
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