Max 10 fpga configuration design guidelines, Dual-purpose configuration pins, Guidelines: dual-purpose configuration pin – Altera MAX 10 FPGA User Manual
Page 31: Max 10 fpga configuration design guidelines -1, Dual-purpose configuration pins -1, Guidelines: dual-purpose configuration pin -1
MAX 10 FPGA Configuration Design Guidelines
3
2015.05.04
UG-M10CONFIG
Dual-Purpose Configuration Pins
Guidelines: Dual-Purpose Configuration Pin
To use configuration pins as user I/O pins in user mode, you have to adhere to the following guidelines.
Table 3-1: Dual-Purpose Configuration Pin Guidelines for MAX 10 Devices
Pins
Guidelines
nCONFIG
During initialization:
• tri-state the external I/O driver and drive an external pull-up resistor
(6)
or
• use the external I/O driver to drive the pins to the state same as the external weak pull-
up resistor
nSTATUS
CONF_DONE
nSTATUS
Tri-state the external driver of the configuration pins before the t
WAIT
(minimum) wait
time is reached. You can use these pins for configuration purpose after t
WAIT
(maximum).
CONF_DONE
TDO
nCONFIG
You can only use the
nCONFIG
pin as a single-ended input pin in user mode.
If the
nCONFIG
is set as user I/O, you can trigger the reconfiguration by:
• asserting
RU_nCONFIG
of the remote system upgrade circuitry
• issuing
PULSE_NCONFIG
JTAG instruction
(6)
If you intend to remove the external weak pull-up resistor, Altera recommends that you remove it after
the device enters user mode.
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