Agilent Technologies HDMP-3001 - Manual (Page 77)

77
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name Reserved Reserved RX_G1[2:0] RX_UNEQ RX_PLM Reserved
R/W — — R R R —
Value 0 0 0 0 0 0
after
reset
ADDR=0x178: Receive UNEQ Monitor
Bits 7-6: Reserved
Bits 5-3: RX_G1[2:0]: When a consistent G1 monitor is received, bits 5,6, and 7 of G1 are written to
RX_G1[2:0].
Bit 2: RX_UNEQ: It contributes to the insertion of Path RDI.
Bit 1: RX_PLM: It contributes to the insertion of Path RDI.
Bit 0: Reserved
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name EXP_C2 [7:0]
R/W R/W
Value 0 0 0 1 1 0 0 0
after
reset
ADDR=0x179: Receive C2 Byte
Bits 7-0: RX_C2 [7:0]: When a consistent G1 monitor is received, bits 5,6, and 7 of G1 are written to
When a consistent C2 value is received for five consecutive frames, the accepted value is written to
RX_C2[7:0]
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name B3_ERRCNT[7:0]
R/W R
Value 0x00
after
reset
ADDR=0x17B: B3 Error Count
Bits 7-0: B3_ERRCNT [7:0]