Agilent Technologies HDMP-3001 - Manual (Page 24)

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MSB PLI '+' 0xB6 NUMBER OF BYTES IN THE GFP PAYLOAD
LSB PLI '+' 0xAB
MSB cHEC '+' 0x31
LSB cHEC '+' 0xE0
MSB TYPE PROGRAMMABLE
LSB TYPE PROGRAMMABLE
MSB tHEC
LSB tHEC
MSB eHEC
LSB eHEC
MSB FCS[31:24] 1) 32-BIT CRC POLYNOMIAL
FCS[23:16] 2) ON PRE-SCRAMBLED DATA
FCS[15:8] 3) COVERS THE GFP PAYLOAD DATA ONLY
LSB FCS[7:0]
DP PROGRAMMABLE SP PROGRAMMABLE
PROGRAMMABLE
MAC PAYLOAD
64-1522 BYTES
SPARE
CORE HEADER
OCTET TRANSMISSION ORDER
SCRAMBLED (X
43
+ 1)
TYPE HEADER
EXTENDED
HEADER
GFP P
A
YLOAD DA
TA
FCS (OPTIONAL)
BIT TRANSMISSION ORDER
NOTE: ‘+’ IN THE DIAGRAM BELOW IS AN EXCLUSIVE OR FUNCTION
NON-SCRAMBLED
Figure 11. The GFP frame
3.8.2.3 GFP Scrambling
Scrambling is performed to pro-
tect the SONET/SDH line against
malicious users deliberately send-
ing packets to cause long
run-lengths of ones or zeros or
replicating the SONET/SDH fram-
ing bytes. In the transmit
direction an X
43 +1 scrambler
scrambles all SPE payload data
except core headers. In the re-
ceive direction, a
self-synchronous X
43 +1
descrambler recovers the
scrambled data.
3.9 SONET/SDH Processing
The HDMP-3001 performs standard
STS-3c/STM-1 processing for both
the transmit and receive direc-
tions. In the transmit direction, the
LAPS/GFP packets are encapsu-
lated into the SONET/SDH SPE/
VC. The POH and TOH/SOH are
inserted, and the resulting STS sig-
nal is transmitted in byte wide
format to a parallel to serial
converter and then to a fiber optic
transceiver.
In the receive direction the pro-
cess is reversed. The byte wide
STS signal is received, the HDMP-
3001 locates the frame and TOH/
SOH, interprets the pointer, termi-
nates the TOH/SOH and POH,
extracts the SPE/VC, and then ex-
tracts the LAPS/GFP packets from
the SPE/VC payload. The LAPS/
GFP frames are then processed
and passed on to an appropriate
link layer device via the MII sys-
tem interface.
3.9.1 Transmit SONET/SDH Process-
ing Overview
The Transmit SONET/SDH Pro-
cessor provides for the
encapsulation of LAPS/GFP pack-
ets into the SPE/VC. It then
inserts the appropriate POH and
TOH/SOH and outputs the final
STS signal to a parallel to serial
converter. The processor per-
forms the following functions:
• Multiplexes LAPS/GFP packets
from the system interface with
Path Overhead (POH) bytes
that it generates to create the
SPE for SONET or VC for SDH.
• Supports the following POH
bytes: Path Trace (J1), Path
BIP-8 (B3), Signal Label (C2),
and Path Status (G1). Other
POH bytes are transmitted as
fixed all zeros.
• Performs AIS and Unequipped
signal insertion.
• TOH/SOH generation,
including:
• Frame bytes, A1A2
• Section Trace, J0
• Section Growth, Z0
• Section BIP-8, B1
• Orderwire, E1, E2
• Section User Channel, F1
• Data Communications
Channel, D1-D12