Rainbow Electronics DS2153Q - Manual (Page 34)

DS2153Q
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1.544 MHz BOUNDARY TIMING WITH ELASTIC STORE(S) ENABLED Figure 13–3
SYSCLK
RSER 1 ,
RSYNC 2
RSYNC 3
RCHCLK
RCHBLK 4
CHANNEL 24/32 CHANNEL 1/2 CHANNEL 23/31
LSB MSB LSB MSB F
TSER
NOTES:
1. Data from the E1 channels 1, 5, 9, 13, 17, 21, 25, and 29 is dropped (channel 2 from the E1 link is mapped to
channel 1 of the T1 link, etc.) and the F–bit position is added (forced to one).
2. RSYNC is in the output mode (RCR1.5=0).
3. RSYNC is in the input mode (RCR1.5=1).
4. RCHBLK is programmed to block channel 24.
2.048 MHz BOUNDARY TIMING WITH ELASTIC STORE(S) ENABLED Figure 13–4
SYSCLK
RSER,
RSYNC 1
RSYNC 2
RCHCLK
RCHBLK 3
CHANNEL 32 CHANNEL 1 CHANNEL 31
LSB MSB LSB
TSER
NOTES:
1. RSYNC is in the output mode (RCR1.5=0).
2. RSYNC is in the input mode (RCR1.5=1).
3. RCHBLK is programmed to block channel 1.