Rainbow Electronics DS2153Q - Manual (Page 12)

DS2153Q
022697 12/48
RSERC CCR2.3 RSER Control.
0=allow RSER to output data as received under all conditions
1=force RSER to one under loss of frame alignment conditions
LOTCMC CCR2.2 Loss of Transmit Clock Mux Control. Determines whether the transmit
side formatter should switch to the ever present RCLK if the TCLK should
fail to transition (see Figure 1.1).
0=do not switch to RCLK if TCLK stops
1=switch to RCLK if TCLK stops
RLB CCR2.1 Remote Loopback.
0=loopback disabled
1=loopback enabled
LLB CCR2.0 Local Loopback.
0=loopback disabled
1=loopback enabled
REMOTE LOOPBACK
When CCR2.1 is set to a one, the DS2153Q will be
forced into Remote LoopBack (RLB). In this loopback,
data recovered off of the E1 line from the RTIP and
RRING pins will be transmitted back onto the E1 line
(with any BPV’s that might have occurred intact) via the
TTIP and TRING pins. Data will continue to pass
through the receive side of the DS2153Q as it would
normally and the data at the TSER pin will be ignored.
Data in this loopback will pass through the jitter attenua-
tor. Please see Figure 1.1 for more details.
LOCAL LOOPBACK
When CCR2.0 is set to a one, the DS2153Q will be
forced into Local LoopBack (LLB). In this loopback,
data will continue to be transmitted as normal through
the transmit side of the SCT. Data being received at
RTIP and RRING will be replaced with the data being
transmitted. Data in this loopback will pass through the
jitter attenuator. Please see Figure 1.1 for more details.
AUTOMATIC ALARM GENERATION
When either CCR2.4 or CCR2.5 is set to one, the
DS2153Q monitors the receive side to determine if any
of the following conditions are present: loss of receive
frame synchronization, AIS alarm (all ones) reception,
or loss of receive carrier (or signal). If any one (or more)
of the above conditions is present, then the DS2151Q
will either force an AIS alarm (if CCR2.5=1) or a Remote
Alarm (CCR2.4=1) to be transmitted via the TTIP and
TRING pins. It is an illegal state to have both CCR2.4
and CCR2.5 set to one at the same time.
CCR3: COMMON CONTROL REGISTER 3 (Address=1B Hex)
(MSB) (LSB)
TESE TCBFS TIRFS ESR LIRST – TSCLKM –
SYMBOL POSITION NAME AND DESCRIPTION
TESE CCR3.7 Transmit Elastic Store Enable.
0 = elastic store is disabled
1 = elastic store is enabled
TCBFS CCR3.6 Transmit Channel Blocking Registers (TCBR) Function Select.
0=TCBRs define the operation of the TCHBLK output pin
1=TCBRs define which signaling bits are to be inserted
TIRFS CCR3.5 Transmit Idle Registers (TIR) Function Select.
0=TIRs define in which channels to insert idle code
1=TIRs define in which channels to insert data from RSER
ESR CCR3.4 Elastic Stores Reset. Setting this bit from a one to a zero will force the
elastic stores to a known depth. Should be toggled after SYSCLK has been