Rainbow Electronics DS2153Q - Manual (Page 33)

DS2153Q
022697 33/48
RECEIVE SIDE BOUNDARY TIMING (WITH ELASTIC STORES DISABLED) Figure 13–2
RCLK
RSER
RSYNC
RCHCLK
RCHBLK 1
RLCLK 2
RLINK
LSB MSB MSB
CHANNEL 32 CHANNEL 1 CHANNEL 2
RLCLK 3
RLCLK 4
Si 1 A Sa4 Sa5 Sa6 Sa7 Sa8
Sa4 Sa5 Sa6 Sa7 Sa8
NOTES:
1. RCHBLK is programmed to block channel 2.
2. RLINK is programmed to output the Sa4 bits.
3. RLINK is programmed to output the SA4 and SA8 bits.
4. RLINK is programmed to output the Sa5 and Sa7 bits.
5. Shown is a non–align frame boundary.