Texas Instruments TMS320C6454 - Manual (Page 204)

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PRODUCT PREVIEW
1
3
4
MDCLK
MDIO
(input)
1
7
MDCLK
MDIO
(output)
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
7.14.4.3 MDIO Electrical Data/Timing
Table 7-90. Timing Requirements for MDIO Input (R)(G)MII (see Figure 7-71 )
-720
-850
NO. UNIT
-1000
MIN MAX
1 t
c(MDCLK)
Cycle time, MDCLK 400 ns
2a t
w(MDCLK)
Pulse duration, MDCLK high 180 ns
2b t
w(MDCLK)
Pulse duration, MDCLK low 180 ns
3 t
t(MDCLK)
Transition time, MDCLK 5 ns
4 t
su(MDIO-MDCLKH)
Setup time, MDIO data input valid before MDCLK high 10 ns
5 t
h(MDCLKH-MDIO)
Hold time, MDIO data input valid after MDCLK high 10 ns
Figure 7-71. MDIO Input Timing
Table 7-91. Switching Characteristics Over Recommended Operating Conditions for MDIO Output
(see Figure 7-72 )
-720
-850
NO. PARAMETER UNIT
-1000
MIN MAX
7 t
d(MDCLKL-MDIO)
Delay time, MDCLK low to MDIO data output valid 100 ns
Figure 7-72. MDIO Output Timing
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