Product preview – Texas Instruments TMS320C6454 User Manual
Page 200
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PRODUCT PREVIEW
RGREFCLK
(Output)
2
3
4
4
1
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
7.14.3.3 EMAC RGMII Electrical Data/Timing
An extra clock signal, RGREFCLK, running at 125 MHz is included as a convenience to the user. Note
that this reference clock is not a free-running clock. This should only be used by an external device if it
does not expect a valid clock during device reset.
Table 7-84. Switching Characteristics Over Recommended Operating Conditions for EMAC RGREFCLK -
RGMII Operation (see
-720
-850
NO.
PARAMETER
UNIT
-1000
MIN
MAX
1
t
c(RGFCLK)
Cycle time, RGREFCLK
8 - 0.8
8 + 0.8
ns
2
t
w(RGFCLKH)
Pulse duration, RGREFCLK high
3.2
4.8
ns
3
t
w(RGFCLKL)
Pulse duration, RGREFCLK low
3.2
4.8
ns
4
t
t(RGFCLK)
Transition time, RGREFCLK
0.75
ns
Figure 7-68. RGREFCLK Timing
Table 7-85. Timing Requirements for RXC - RGMII Operation (see
-720
-850
NO.
UNIT
-1000
MIN
MAX
10 Mbps
360
440
1
t
c(RXC)
Cycle time, RXC
100 Mbps
36
44
ns
1000 Mbps
7.2
8.8
10 Mbps
0.40*t
c(RXC)
0.60*t
c(RXC)
2
t
w(RXCH)
Pulse duration, RXC high
100 Mbps
0.40*t
c(RXC)
0.60*t
c(RXC)
ns
1000 Mbps
0.45*t
c(RXC)
0.55*t
c(RXC)
10 Mbps
0.40*t
c(RXC)
0.60*t
c(RXC)
3
t
w(RXCL)
Pulse duration, RXC low
100 Mbps
0.40*t
c(RXC)
0.60*t
c(RXC)
ns
1000 Mbps
0.45*t
c(RXC)
0.55*t
c(RXC)
10 Mbps
0.75
4
t
t(RXC)
Transition time, RXC
100 Mbps
0.75
ns
1000 Mbps
0.75
200
C64x+ Peripheral Information and Electrical Specifications