Altera Stratix II GX PCI Express Development Board User Manual
Page 59
Altera Corporation
Reference Manual
2–49
August 2006
Stratix II GX PCI Express Development Board
Board Components & Interfaces
lists QDRII SRAM component reference and manufacturing
information.
lists the QDRII SRAM pin-out and corresponding Stratix II GX
device pin number.
Table 2–31. QDRII SRAM Component Reference and Manufacturing Information
Board
Reference
Device Description
Manufacturer
Manufacturer Part Number
Manufacturer
Website
U6
Burst-of-four, 300 MHz QDRII
SRAM
NEC
UPD44165364AF5-E33-EQ2-A
www.nec.com
Table 2–32. QDRII SRAM Pin-Out (Part 1 of 4)
Schematic Signal Name
Stratix II GX Pin Number
qdrii_a[0]
D10
qdrii_a[1]
D9
qdrii_a[10]
F16
qdrii_a[11]
J15
qdrii_a[12]
M14
qdrii_a[13]
P16
qdrii_a[14]
J16
qdrii_a[15]
C11
qdrii_a[16]
G10
qdrii_a[17]
C19
qdrii_a[18]
N21
qdrii_a[2]
N20
qdrii_a[3]
F18
qdrii_a[4]
N19
qdrii_a[5]
H21
qdrii_a[6]
D16
qdrii_a[7]
H15
qdrii_a[8]
D13
qdrii_a[9]
P15
qdrii_bwsn[0]
A9
qdrii_bwsn[1]
C21
qdrii_bwsn[2]
C10
qdrii_bwsn[3]
A10
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)