Altera Stratix II GX PCI Express Development Board User Manual
Page 50
2–40
Reference Manual
Altera Corporation
Stratix II GX PCI Express Development Board
August 2006
Standard Communication Ports
hsmb_rx_d_n[3]
68
AG37
hsmb_rx_d_n[4]
74
AH38
hsmb_rx_d_n[5]
80
AK39
hsmb_rx_d_n[6]
86
AK37
hsmb_rx_d_n[7]
92
AM39
hsmb_rx_d_n[8]
104
AE34
hsmb_rx_d_n[9]
110
AF36
hsmb_rx_d_p[0]
48
AE37
hsmb_rx_d_p[1]
54
AE39
hsmb_rx_d_p[10]
114
AG36
hsmb_rx_d_p[11]
120
AH37
hsmb_rx_d_p[12]
126
AJ37
hsmb_rx_d_p[13]
132
AK36
hsmb_rx_d_p[14]
138
AL39
hsmb_rx_d_p[15]
144
AP39
hsmb_rx_d_p[16]
150
AR39
hsmb_rx_d_p[2]
60
AF39
hsmb_rx_d_p[3]
66
AG38
hsmb_rx_d_p[4]
72
AH39
hsmb_rx_d_p[5]
78
AJ39
hsmb_rx_d_p[6]
84
AK38
hsmb_rx_d_p[7]
90
AN39
hsmb_rx_d_p[8]
102
AE35
hsmb_rx_d_p[9]
108
AF37
hsmb_rx_n[0]
32
AR2
hsmb_rx_n[1]
28
AN2
hsmb_rx_n[2]
24
AU2
hsmb_rx_n[3]
20
AW4
hsmb_rx_p[0]
30
AR1
hsmb_rx_p[1]
26
AN1
hsmb_rx_p[2]
22
AU1
hsmb_rx_p[3]
18
AW3
hsmb_scl
34
AG30
Table 2–28. HSMC B Connector Pin-Out
Schematic Signal Name
Samtec Pin Number
Stratix II GX
Pin Number
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)