Altera Stratix II GX PCI Express Development Board User Manual
Page 47
![background image](https://www.manualsdir.com/files/763835/content/doc047.png)
Altera Corporation
Reference Manual
2–37
August 2006
Stratix II GX PCI Express Development Board
Board Components & Interfaces
hsma_rx_d_p[15]
144
R39
hsma_rx_d_p[16]
150
U39
hsma_rx_d_p[2]
60
L37
hsma_rx_d_p[3]
66
M37
hsma_rx_d_p[4]
72
N38
hsma_rx_d_p[5]
78
P37
hsma_rx_d_p[6]
84
R35
hsma_rx_d_p[7]
90
T38
hsma_rx_d_p[8]
102
U37
hsma_rx_d_p[9]
108
N36
hsma_rx_n[0]
32
C2
hsma_rx_n[1]
28
A4
hsma_rx_n[2]
24
E2
hsma_rx_n[3]
20
G2
hsma_rx_n[4]
16
J2
hsma_rx_n[5]
12
L2
hsma_rx_p[0]
30
C1
hsma_rx_p[1]
26
A3
hsma_rx_p[2]
22
E1
hsma_rx_p[3]
18
G1
hsma_rx_p[4]
14
J1
hsma_rx_p[5]
10
L1
hsma_scl
34
H36
hsma_sda
33
F38
hsma_tx_d_n[0]
49
G32
hsma_tx_d_n[1]
55
J31
hsma_tx_d_n[10]
115
L33
hsma_tx_d_n[11]
121
R27
hsma_tx_d_n[12]
127
N33
hsma_tx_d_n[13]
133
P33
hsma_tx_d_n[14]
139
R32
hsma_tx_d_n[15]
145
T32
hsma_tx_d_n[16]
151
U33
hsma_tx_d_n[2]
61
K31
hsma_tx_d_n[3]
67
L31
Table 2–27. HSMC A Connector Pin-Out (Part 3 of 5)
Schematic Signal Name
Samtec Pin Number
Stratix II GX Pin Number
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)