Timing, Timing –3 – Altera Avalon Verification IP Suite User Manual
Page 46
Chapter 3: Avalon-MM Slave BFM
3–3
Functional Description
May 2011
Altera Corporation
Avalon Verification IP Suite User Guide
Timing
The timing diagram in
illustrates the sequence of events for an Avalon-MM
Slave BFM responding to interleaved writes and reads when the
readdatavalid
signal is present.
Figure 3–2. Avalon-MM Slave Responding to Interleaved Write and Read Transactions
CLK
read
transaction1
transaction2
trans3 trans4
write
S
cr_1
waitrequest
byteenable[3:0]
writedata[31:0]
readdatavalid
readdata
D1
D3
D2
D4
T
wr
T
wt_1
T
wt_2
T
rl_1
T
rl_2
S
cr_2
S
cr_3
S
cr_4
transactionid
writeresponse
writeid
ID_1
ID_3
writeresponsevalid
T
rl_1
readresponse
readid
ID_2
ID_4
S
rc_2
S
rc_4
S
rc_1
S
rc_3
T
ID_1
T
ID_2
T ID_3
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