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Block diagram, Block diagram –5 – Altera Avalon Verification IP Suite User Manual

Page 28

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Chapter 1: Avalon-MM Master BFM

1–5

Functional Description

May 2011

Altera Corporation

Avalon Verification IP Suite User Guide

Block Diagram

Figure 1–4

shows a block diagram of the Avalon-MM Master BFM. As this figure

illustrates, the BFM includes the following major blocks:

Avalon-MM Master API—Provides methods to create Avalon-MM transactions
and query the state of all queues.

Command Descriptor—Accumulates the fields of an Avalon-MM command
transaction using the

set_command

API calls and inserts completed commands

onto the pending command queue.

Avalon-MM Interface Driver—Issues transfers to the system interconnect fabric
and holds each transfer until

waitrequest

is deasserted. For burst transfers, there

is a separate transfer for each word of the burst. The system interconnect fabric can
assert

waitrequest

for each word of the burst, as necessary.

Timestamp Counter—Records a timestamp with commands for use in timing
calculations. The driver and monitor both use the timestamp counter for timing
calculations.

Avalon-MM Interface Monitor—Monitors the system interconnect fabric and
records responses for read transfers in the response queue.

Response Descriptor—Collects information about completed transactions using
the

get_response_

API calls. The testbench uses this information for

further analysis.

Public Events—Provides status response that arrives together with the data. The
public event signals indicate the status of the Master’s request such as successful
completion, timeout, or error.

S

ci_1

–S

ci_2

Signals when write and read commands are presented on the interface. The event name is

signal_command_issued

.

S

rc_1

Signals the first read response. The event name is

signal_response_complete.

S

atc

Signals the end of the test. The event name is

signal_all_transactions_complete.

Table 1–2. Key to Annotations in

Figure 1–3

(Part 2 of 2)

Symbol

Description