Altera Avalon Verification IP Suite - Manual (Page 42)

May 2011 Altera Corporation Avalon Verification IP Suite User Guide
2. Avalon-MM Master BFM with
Avalon-ST API Wrapper
The Avalon-MM Master BFM with Avalon-ST API Wrapper provides an alternative
way for the Avalon-MM Master BFM API to support VHDL testbenches. You can use
the Avalon-MM Master BFM with Avalon-ST API Wrapper in HDL simulators that
support mixed language simulation.
1 The API wrapper is only supported in SOPC Builder. The API wrapper cannot be
generated in Qsys to create VHDL simulation models.
The Avalon-MM Master BFM with Avalon-ST API Wrapper component is
implemented in SystemVerilog and uses an API wrapper to cast the Avalon-MM
Master BFM’s method calls and returns into signals that are carried on the call and
return interface ports. To call a method, the method identifier is inserted into the BFM
wrapper component via the channel field; the data is the arguments for the method.
After the method is complete, the data field transports the arguments for the method
call. The response is returned on the response Avalon-ST interface, and that
Avalon-ST data signal carries the return value. The wrapper is necessary because
VHDL can only access ports and does not support the method calls across hierarchical
boundaries used in the Avalon-MM Master BFM field.
Figure 2–1 provides a
high-level view the VHDL testbench communicating with the BFM.
Figure 2–1. Avalon-MM Master BFM with Avalon-ST Wrapper
Avalon-MM Master BFM Translator
API Methods
(Tasks & Functions
SystemVerilog)
API Calls and Returns
Ports to References
Avalon-MM Slave
VHDL
Testbench Using Mixed-Language Simulator
Avalon-MM
Avalon-ST
Function
Calls
Avalon-ST
Function
Returns
Avalon-MM Master BFM with Avalon-ST Wrapper
API Call
Interface
Test Program
VHDL