Altera ALTDLL - Manual (Page 82)

Chapter 4: Functional Description 4–46
Correct Settings for External Memory Interfaces
© February 2012 Altera Corporation ALTDLL and ALTDQ_DQS Megafunctions User Guide
Correct Settings for External Memory Interfaces
Table 4–20 shows the correct settings required for the ALTDLL and ALTDQ_DQS
megafunctions to work in the DDR, QDR, and RLDRAM interfaces.
f n represents the number of pins in a path. The value of n ranges from 0 to 48, but
varies according to the memory interface used. To determine the value of n for a
particular memory interface, the External Memory Interface chapter of the respective
device handbooks.
Table 4–20. Correct Settings for DDR, QDR, and RLDRAM Interfaces
Parameter DDR
QDR RLDRAM
read write read write
RLDRAMII mode Unused Unused Turned on. Refer to the
“ALTDQ_DQS Parameter
Editor” on page 3–5 .
Data mask pin group Unused Unused
Q valid signal group Unused Unused
Number of bidirectional DQ n 0 0 n
Number of input DQ 0 n 0 0
Number of output DQ 0 0 n 0
Enable DQ output enable path Turned on Turned off Turned on Turned on
Use half-rate components For full-rate controller: Turned off For half-rate controller:
Turned on
Use dynamic OCT path Turned on Turned on
Enable DQS input path Turned on Turned on Turned off Turned on Turned off
Enable DQS output path Turned on Turned off Turned off
Enable DQS OE path Turned on Turned off Turned off
DQS/DQSn IO configuration mode If used: Differential
pair
If single_ended: Turned
off
Complementary pair Differential pair
DQS input frequency MHz (e.g. 400 MHz)
DQS delay chain phase setting <n> = phase_shift / 360 x DLL_delay_chain_length
DQS delay chain ‘delayctrlin’ port source DLL
Enable DQS input delay chain Default:Turned off
If used: Turned on
Delay buffer mode High or Low (depending on the ALTDLL instantiation settings)
Enable DQS delay chain Turned on