Altera ALTDLL - Manual (Page 38)

Chapter 4: Functional Description 4–2
Custom External Memory Interface Datapaths Overview
© February 2012 Altera Corporation ALTDLL and ALTDQ_DQS Megafunctions User Guide
f For more information about the blocks available in the datapaths for your target
device family, refer to the following chapters in the device handbook:
■ External Memory Interfaces in HardCopy III Devices chapter in volume 1 of the
HardCopy III Device Handbook
■ External Memory Interfaces in HardCopy IV Devices chapter in volume 1 of the
HardCopy IV Device Handbook
■ External Memory Interfaces in Arria II GX Devices chapter in volume 1 of the Arria
II GX Device Handbook
■ External Memory Interfaces in Stratix IV Devices chapter in volume 1 of the Stratix IV
Device Handbook
■ External Memory Interfaces in Stratix III Devices chapter in volume 1 of the Stratix III
Device Handbook
1 The DQ/DQS read and write signals in Figure 4–1 may be bidirectional or
unidirectional, depending on the memory standard. When bidirectional, the signal is
active during both read and write operations.
Table 4–2 lists the megafunction blocks in Figure 4–1 :
Table 4–1. Megafunction Blocks
Megafunction Block Description
ALTDLL The ALTDLL megafunction controls the DLL and DLL offset blocks. For more
information about the DLL blocks, refer to
“ALTDLL Megafunction” on
page 4–3 .
ALTDQ_DQS The ALTDQ_DQS megafunction controls the following memory interface
datapaths:
■ DQS Input Path
■ DQ Input Path
■ DQ Output/OE Path
■ DQS Output/OE Path
■ DQ/DQS OCT Path
For more information about the datapaths, refer to “ALTDQ_DQS
Megafunction” on page 4–4 .
ALTPLL The ALTPLL megafunction block provides the clocking scheme used in the
custom external memory interface for half-rate or full-rate interface. For more
information about using PLLs, refer to the
ALTPLL Megafunction User Guide .
ALTIOBUF The ALTIOBUF megafunction provides I/O buffer variations to connect the
ALTDQ_DQS instance to the FPGA pins and to support dynamic OCT feature.