Maxim Integrated 71M6521BE Energy Meter IC Family Software - Manual (Page 119)

71M652X Software User’s Guide
Revision 1.7 TERIDIAN Proprietary 119 of 138
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
6.3.2 80515 MPU
The 80515 MPU is composed of four components:
1. Control unit
2. Arithmetic-logic unit
3. Memory control unit
4. RAM and SFR control unit
The 80515 MPU allows instruction fetch from program memory and instruction execution using RAM or SFR. The
following chapter describes the main MPU registers.
Accumulator
ACC is the accumulator register. Most instructions use the accumulator to hold the operand. The mnemonics for
accumulator-specific instructions refer to accumulator as “A”, not ACC.
The B Register
The B register is used during multiply and divide instructions. It can also be used as a scratch-pad register to hold
temporary data.
Program Status Word (PSW)
MSB LSB
CV AC F0 RS1 RS OV - P
Table 6-18: PSW Register Flags
Bit Symbol Function
PSW.7 CV Carry flag
Psw.6 AC Auxiliary Carry flag for BCD operations
PSW.5 F0 General purpose Flag 0 available for user
PSW.4 RS1 Register bank select control bits. The contents of rs1 and rs0 select the working
register bank as follows:
(0, 0): Bank 0 (0x00-0x07)
(0,1): Bank 1 (0x08-0x0F)
(1, 0): Bank 2 (0x10-0x17)
(1, 1): Bank 3 (0x18-0x1F)
PSW.3 RS0
PSW.2 OV Overflow flag
PSW.1 - User defined flag
PSW.0 P Parity flag, affected by hardware to indicate odd / even number of “one” bits in the
Accumulator, i.e. even parity.
Table 6-19: PSW Bit Functions