Rainbow Electronics AT89C5122 - Manual (Page 197)

197
AT8xC5122/23
4202E–SCR–06/06
External Data Memory Read
Cycle
Serial Port Timing - Shift
Register Mode Table 118. Symbol Description (F = 40 MHz)
Table 119. AC Parameters for a Variable Clock
ALE
PSEN
RD
PORT 0
PORT 2
A0-A7 DATA IN
ADDRESS
OR SFR-P2
T
AVWL
T
LLWL
T
RLAZ
ADDRESS A8-A15 OR SFR P2
T
RHDZ
T
WHLH
T
RLRH
T
LLDV
T
RHDX
T
LLAX
T
AVDV
Symbol Parameter
T
XLXL
Serial port clock cycle time
T
QVHX
Output data set-up to clock rising edge
T
XHQX
Output data hold after clock rising edge
T
XHDX
Input data hold after clock rising edge
T
XHDV
Clock rising edge to input data valid
Symbol Type
Standard
Clock X2 Clock X parameter Units
T
XLXL
Min 12T 6 T ns
T
QVHX
Min 10T - x 5 T - x 50 ns
T
XHQX
Min 2T - x T - x 20 ns
T
XHDX
Min x x 0 ns
T
XHDV
Max 10T - x 5 T- x 133 ns