Low pin-count boot process – Rainbow Electronics AT89C5131 User Manual
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AT89C5131
4136A–USB–03/03
WARNING: Security level 2 and 3 should only be programmed after Flash and Core
verification.
Program Lock Bits
These security bits protect the code access through the parallel programming interface.
They are set by default to level 4.
Low Pin-count Boot
Process
The bootloader can be activated by two means: Regular boot process or Hardware
condition.
The hardware condition must be configured by the user using the P1_CF, P3_CF and
P4_CF bytes.
The hardware condition is detected by a low level on the corresponding input.
Example: Configure the pin 2 of the port 3 as Hardware condition.
The corresponding value for these bytes are:
P1_CF = FFh
P3_CF = FBh
P4_CF = FFh
Note:
If more than 1 nit of P1_CF, P3_CF and P4_CF are to zero, the higher priority is on
P1_CF.0, the lowest priority is on P4_CF.1
The bootloader USB must be activated if the BLJB = 0.
The on-chip bootloader boot process is shown Figure 23.
All routines for software access are provided in the C Flash driver (see reference
section).
Example of boot process in FM1 (see Figure 23)
Purpose
BLJB
The Bootloader Jump Bit forces the application execution.
BLJB = 0 = > Bootloader execution.
BLJB = 1 = > Application execution
The BLJB is a fuse bit in the Hardware Byte.
That can be modified by hardware (programmer) or by software (API).
Note:
1.
The BLJB test is perform by hardware to prevent any program
execution.
SBV
The Software Boot Vector contains the high address of customer bootloader
stored in the application.
SBV = FCh (default value) if no customer bootloader in user Flash.
Note:
The customer bootloader is called by JMP [SBV]00h instruction.
P1_CF
The P1_CF can contain the user condition for Hardware condition on Port 1
P1_CF is a byte of the XROW area
P3_CF
The P3_CF can contain the user condition for Hardware condition on Port 3
P3_CF is a byte of the XROW area
P4_CF
The P4_CF can contain the user condition for Hardware condition on Port 4
P4_CF is a byte of the XROW area