Rainbow Electronics AT89C5131 - Manual (Page 30)

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AT89C5131
4136A–USB–03/03
Loading the Column Latches Any number of data from 1 byte to 128 bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus, no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 15:
• Map the column latch space by setting FPS bit.
• Load the DPTR with the address to load.
• Load Accumulator register with the data to load.
• Execute the MOVX @DPTR, A instruction.
• If needed loop the three last instructions until the page is completely loaded.
Figure 15. Column Latches Loading Procedure
Programming the Flash Spaces
User The following procedure is used to program the User space and is summarized in
Figure 16:
• Load data in the column latches from address 0000h to 7FFFh (1) .
• Disable the interrupts.
• Launch the programming by writing the data sequence 50h followed by A0h in
FCON register.
The end of the programming indicated by the FBUSY flag cleared.
• Enable the interrupts.
Note: 1. The last page address used when loading the column latch is the one used to select
the page programming address.
Column Latches
Loading
Data Load
DPTR = Address
ACC = Data
Exec: MOVX @DPTR, A
Last Byte
to load?
Column Latches Mapping
FPS = 1
Data memory Mapping
FPS = 0