Texas Instruments TMS380C26 - Manual (Page 8)

TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
POST OFFICE BOX 1443
•
HOUSTON, TEXAS
77251–1443
8
Terminal Functions (continued)
PIN NAME NO. I/O DESCRIPTION
PRTYEN 22 IN
Parity Enable. The value on this pin is loaded into the PEN bit of the SIFACL register at reset (i.e.,
when the SRESET pin is asserted or the ARESET bit in the SIFACL register is set) to form a default
value. This bit enables parity checking for the local memory.
H = Local memory data bus checked for parity (see Note 1).
L
= Local memory data bus NOT checked for parity.
NSELOUT0
NSELOUT1 21
93 OUT
OUT
Network Selection Outputs. These output signals are controlled by the host through the
corresponding bits of the SIFACTL register. The value of these bits/signals can only be changed while
the TMS380C26 is reset.
NSELOUT0 NSELOUT1 Description
L L Reserved
L H 16 Mbps token ring
H L Ethernet (802.3/Blue Book)
H H 4 Mbps token ring
NOTE 1: Pin has an internal pullup device to maintain a high voltage level when left unconnected (no etch or loads).