Texas Instruments TMS380C26 - Manual (Page 22)

NOTE:
The Adapter-Internal Pointers Table is defined only after TMS380C26 initialization and until the OPEN
command is issued.
These pointers are defined by the TMS380C26 software (microcode), and this table describes the release
1.00 and 2.x software.
TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
POST OFFICE BOX 1443
•
HOUSTON, TEXAS
77251–1443
22
The Protocol Handler contains many state machines which provide the following features:
•
Transmit and receive frames
•
Capture tokens (token ring)
•
Provide token-priority controls (token ring)
•
Automatic retry of frame transmissions after collisions (Ethernet)
•
Implement the Random Exponential Backoff algorithm (Ethernet)
•
Manage the TMS380C26 buffer memory
•
Provide frame address recognition (group, specific, functional, and multicast)
•
Provide internal parity protection
•
Control and verify the physical layer circuitry interface signals
Integrity of the transmitted and received data is assured by cyclic redundancy checks (CRC), detection of
network data violations, and parity on internal data paths. All data paths and registers are optionally
parity-protected to assure functional integrity.
adapter support function (ASF)
The Adapter Support Function (ASF) performs support functions not contained in the other blocks. The features
are:
•
The TMS380C26 base timer,
•
Identification, management, and service of internal and external interrupts,
•
Test pin mode control, including the unit-in-place mode for board testing,
•
Checks for illegal states, such as illegal opcodes and parity.
clock generator (CG)
The Clock Generator (CG) performs the generation of all the clocks required by the other functional blocks and
the local memory bus clocks. This block also generates the reference clock to be sampled by the SIF to
determine if the TMS380C26 needs to be placed into slow clock mode. This reference clock is free floating in
the range of 10 – 100 kHz.
user-accessible hardware registers and TMS380C26-internal pointers
The following tables show how to access internal data via pointers and how to address the registers in the host
interface. The SIFACL register, which directly controls device operation, is described in detail.