Texas Instruments TMS380C26 - Manual (Page 68)

TMS380C26 NETWORK COMMPROCESSOR
SPWS010A–APRIL
1992–REVISED MARCH 1993
68
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PARAMETER MEASUREMENT INFORMATION
SOWN
(see Note A)
SDDIR
SADH0–SADH7,
SADL0–SADL7,
SPH, SPL
SBHE
SRD, SWR
SHRQ
SIF Outputs:
SBBSY,
SHLDA
SBCLK
SIF Inputs:
SIF Master Bus Exchange User Master
T1 TX I2 I1 (T4)
Read
Write
Address Valid
212
212 241a
241
208b
208a
230
224c
224a
NOTE A: While the system interface DMA controls are active (i.e., SOWN is asserted), the SCS input is disabled.
Figure 32. 80x8x Mode Bus Arbitration Timing, SIF Takes Control