Texas Instruments TMS380C26 - Manual (Page 78)

TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
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78
PARAMETER MEASUREMENT INFORMATION
SADH0–SADH7,
SADL0–SADL7,
SPH, SPL
SDTACK†
SDBEN‡
SDDIR
SUDS,
SLDS
(see Note A)
SRNW
SIACK
SCS SRSX,
SRS0, SRS1
HI-Z
HI-Z HI-Z
HI-Z
(High)
Valid
Data
263
262
275
283W 282W
280
281
272a
272
273
268 267
281a
282b
276
(see Note 36)
255
273a
286
273a
279
† SDTACK is an active-low bus ready signal. It must be asserted before data output.
‡ When the TMS380C16 begins to drive SDBEN inactive, it has already latched the write date internally. Parameter 263 must be met to the input
of the data buffers.
NOTE A: For 68xxx mode, skew between SLDS and SUDS must not exceed 10 ns. Provided this limitation is observed, all events referenced
to a data strobe edge use the later occurring edge. Events defined by two data strobes edges, such as parameter 286, are measured
between latest and earlier edges.
Figure 38. 68xxx DIO Write Timing