6 margin requirements, 7 carrier-in-carrier latency, 9 carrier-in-carrier link design – Comtech EF Data DMD-2050E User Manual
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DMD2050E Universal Satellite Modem
Theory of Operation
MN-DMD2050E Revision 2
3–35
Unwanted interfering signal suppression of 30 dB or more has been achieved in commercial
products with minimal degradation of the demodulator performance.
3.11.6 Margin Requirements
Typical interfering signal cancellation is 28 to 35 dB (depending on the product). The residual
interfering signal appears as noise causing a slight degradation of the Eb/No. To compensate for
the residual noise, a small amount of additional link margin is required to maintain the BER.
Margin requirements depend on the product, modulation and power ratios. For the DMD2050E,
the additional margin requirements are:
Modulation
Nominal Margin*
BPSK
0.3 dB
QPSK/OQPSK 0.3 dB
8-PSK
0.5 dB
8-QAM
0.4 dB
16-QAM
0.6 dB
* Equal power and equal symbol rate for the interfering carrier and the desired carrier, i.e., 0 dB
PSD ratio. Measured at IF with AWGN, +10 dBc Adjacent Carriers, 1.3 spacing.
3.11.7 Carrier-in-Carrier Latency
Carrier-in-Carrier has no measurable impact on circuit latency.
3.11.8 Carrier-in-Carrier and Adaptive Coding and Modulation
Carrier-in-Carrier is fully compatible with STANAG TURBO Information Throughput Adaptation
(ITA) mode of operation in the DMD2050E.
Carrier-in-Carrier combined with STANAG TURBO ITA can provide 100 – 200% increase in
average throughput.
3.11.9 Carrier-in-Carrier Link Design
Carrier-in-Carrier link design involves finding the FEC and modulation combination that provides
optimal bandwidth utilization. Just like conventional link design, it is an iterative process that