Altera Stratix V Advanced Systems Development Board - Manual (Page 69)

Chapter 2: Board Components 2–59
Memory
January 2014 Altera Corporation Stratix V Advanced Systems Development Board
Reference Manual
C8 MOSYS1_CMDBRX_N3 1.4-V PCML AA3 Transceiver output
A7 MOSYS1_CMDBRX_N4 1.4-V PCML W3 Transceiver output
C6 MOSYS1_CMDBRX_N5 1.4-V PCML U3 Transceiver output
A5 MOSYS1_CMDBRX_N6 1.4-V PCML R3 Transceiver output
C4 MOSYS1_CMDBRX_N7 1.4-V PCML N3 Transceiver output
B11 MOSYS1_CMDBRX_P0 1.4-V PCML AG4 Transceiver output
D10 MOSYS1_CMDBRX_P1 1.4-V PCML AE4 Transceiver output
B9 MOSYS1_CMDBRX_P2 1.4-V PCML AC4 Transceiver output
D8 MOSYS1_CMDBRX_P3 1.4-V PCML AA4 Transceiver output
B7 MOSYS1_CMDBRX_P4 1.4-V PCML W4 Transceiver output
D6 MOSYS1_CMDBRX_P5 1.4-V PCML U4 Transceiver output
B5 MOSYS1_CMDBRX_P6 1.4-V PCML R4 Transceiver output
D4 MOSYS1_CMDBRX_P7 1.4-V PCML N4 Transceiver output
T22 MOSYS1_CONFIGN 1.5-V CMOS A16 Configuration enable
H22 MOSYS1_DMON_N0 1.5-V CMOS — Digital monitor
F3 MOSYS1_DMON_N1 1.5-V CMOS — Digital monitor
G22 MOSYS1_DMON_P0 1.5-V CMOS — Digital monitor
E3 MOSYS1_DMON_P1 1.5-V CMOS — Digital monitor
K22 MOSYS1_EVENTAN 1.5-V CMOS C16 Error detect (CMDARX)
L21 MOSYS1_EVENTBN 1.5-V CMOS H15 Error detect (CMDBRX)
AB21 MOSYS1_QATX_N0 1.4-V PCML BB1 Transceiver input
Y20 MOSYS1_QATX_N1 1.4-V PCML BA3 Transceiver input
AB19 MOSYS1_QATX_N2 1.4-V PCML AY1 Transceiver input
Y18 MOSYS1_QATX_N3 1.4-V PCML AW3 Transceiver input
AB17 MOSYS1_QATX_N4 1.4-V PCML AV1 Transceiver input
Y16 MOSYS1_QATX_N5 1.4-V PCML AT1 Transceiver input
AB15 MOSYS1_QATX_N6 1.4-V PCML AP1 Transceiver input
Y14 MOSYS1_QATX_N7 1.4-V PCML AM1 Transceiver input
AA21 MOSYS1_QATX_P0 1.4-V PCML BB2 Transceiver input
W20 MOSYS1_QATX_P1 1.4-V PCML BA4 Transceiver input
AA19 MOSYS1_QATX_P2 1.4-V PCML AY2 Transceiver input
W18 MOSYS1_QATX_P3 1.4-V PCML AW4 Transceiver input
AA17 MOSYS1_QATX_P4 1.4-V PCML AV2 Transceiver input
W16 MOSYS1_QATX_P5 1.4-V PCML AT2 Transceiver input
AA15 MOSYS1_QATX_P6 1.4-V PCML AP2 Transceiver input
W14 MOSYS1_QATX_P7 1.4-V PCML AM2 Transceiver input
AB11 MOSYS1_QBTX_N0 1.4-V PCML AK1 Transceiver input
Y10 MOSYS1_QBTX_N1 1.4-V PCML AH1 Transceiver input
AB9 MOSYS1_QBTX_N2 1.4-V PCML AF1 Transceiver input
Table 2–27. MoSys MSR576 Interface Pin Assignments, Signal Names and Functions (Part 2 of 5)
Board Reference Schematic Signal Name I/O Standard
Stratix V GX FPGA
Device Pin Number
Description