beautypg.com

Altera Stratix V Advanced Systems Development Board User Manual

Page 50

background image

2–40

Chapter 2: Board Components

Components and Interfaces

Stratix V Advanced Systems Development Board

January 2014

Altera Corporation

Reference Manual

36

HSMC_JTAG_TMS

2.5-V

JTAG mode select

160

HSMC_PRSNTn

1.5-V

AH13

HSMC presence detect signal

34

HSMC_SCL

2.5-V

BB36

Management serial clock line

33

HSMC_SDA

2.5-V

BB8

Management serial data line

50

HSMC_RX_D_N0

LVDS or 2.5-V

V11

LVDS RX or CMOS data bus

56

HSMC_RX_D_N1

LVDS or 2.5-V

V9

LVDS RX or CMOS data bus

62

HSMC_RX_D_N2

LVDS or 2.5-V

T9

LVDS RX or CMOS data bus

68

HSMC_RX_D_N3

LVDS or 2.5-V

T11

LVDS RX or CMOS data bus

74

HSMC_RX_D_N4

LVDS or 2.5-V

N14

LVDS RX or CMOS data bus

80

HSMC_RX_D_N5

LVDS or 2.5-V

N13

LVDS RX or CMOS data bus

86

HSMC_RX_D_N6

LVDS or 2.5-V

L11

LVDS RX or CMOS data bus

92

HSMC_RX_D_N7

LVDS or 2.5-V

L8

LVDS RX or CMOS data bus

104

HSMC_RX_D_N8

LVDS or 2.5-V

H10

LVDS RX or CMOS data bus

110

HSMC_RX_D_N9

LVDS or 2.5-V

H8

LVDS RX or CMOS data bus

116

HSMC_RX_D_N10

LVDS or 2.5-V

F11

LVDS RX or CMOS data bus

122

HSMC_RX_D_N11

LVDS or 2.5-V

F8

LVDS RX or CMOS data bus

128

HSMC_RX_D_N12

LVDS or 2.5-V

F10

LVDS RX or CMOS data bus

134

HSMC_RX_D_N13

LVDS or 2.5-V

D9

LVDS RX or CMOS data bus

140

HSMC_RX_D_N14

LVDS or 2.5-V

C12

LVDS RX or CMOS data bus

146

HSMC_RX_D_N15

LVDS or 2.5-V

A11

LVDS RX or CMOS data bus

152

HSMC_RX_D_N16

LVDS or 2.5-V

A8

LVDS RX or CMOS data bus

48

HSMC_RX_D_P0

LVDS or 2.5-V

V12

LVDS RX or CMOS data bus

54

HSMC_RX_D_P1

LVDS or 2.5-V

V10

LVDS RX or CMOS data bus

60

HSMC_RX_D_P2

LVDS or 2.5-V

U9

LVDS RX or CMOS data bus

66

HSMC_RX_D_P3

LVDS or 2.5-V

T12

LVDS RX or CMOS data bus

72

HSMC_RX_D_P4

LVDS or 2.5-V

P14

LVDS RX or CMOS data bus

78

HSMC_RX_D_P5

LVDS or 2.5-V

P13

LVDS RX or CMOS data bus

84

HSMC_RX_D_P6

LVDS or 2.5-V

K11

LVDS RX or CMOS data bus

90

HSMC_RX_D_P7

LVDS or 2.5-V

M8

LVDS RX or CMOS data bus

102

HSMC_RX_D_P8

LVDS or 2.5-V

J10

LVDS RX or CMOS data bus

108

HSMC_RX_D_P9

LVDS or 2.5-V

H9

LVDS RX or CMOS data bus

114

HSMC_RX_D_P10

LVDS or 2.5-V

G11

LVDS RX or CMOS data bus

120

HSMC_RX_D_P11

LVDS or 2.5-V

G8

LVDS RX or CMOS data bus

126

HSMC_RX_D_P12

LVDS or 2.5-V

G10

LVDS RX or CMOS data bus

132

HSMC_RX_D_P13

LVDS or 2.5-V

E8

LVDS RX or CMOS data bus

138

HSMC_RX_D_P14

LVDS or 2.5-V

D12

LVDS RX or CMOS data bus

144

HSMC_RX_D_P15

LVDS or 2.5-V

B11

LVDS RX or CMOS data bus

150

HSMC_RX_D_P16

LVDS or 2.5-V

B8

LVDS RX or CMOS data bus

Table 2–22. HSMC Port Pin Assignments, Schematic Signal Names, and Functions (Part 3 of 4)

Board

Reference

(J1)

Schematic Signal Name

I/O Standard

Stratix V GX

FPGA2 Device Pin

Number

Description