Altera Stratix V Advanced Systems Development Board - Manual (Page 6)

1–2 Chapter 1: Overview
Development Board Component Blocks
Stratix V Advanced Systems Development Board January 2014 Altera Corporation
Reference Manual
Development Board Component Blocks
The board features the following major component blocks:
■ Two Altera Stratix V FPGA (5SGXEA7N2F45C2N) in the 1932-pin FineLine BGA
package
■ MAX ® V CPLD (5M2210ZF256C4N) System Controller in the 256-pin FineLine
BGA package and Flash Fast Passive Parallel (FPP) configuration
■ 1-Gbit (Gb) serial flash
■ FPGA Configuration Circuitry
■ MAX V CPLD (5M2210ZF256C4N) and FPP configuration.
■ On-Board USB-Blaster TM II for use with the Quartus ® II Programmer, Nios ® II
Software Build Tools, and System Console.
■ EPCQ for x4 Active Serial (AS) configuration.
■ On-Board Clocking Circuitry
■ 50-MHz, 100-MHz, and 125-MHz fully programmable oscillators
■ SMA connector for clock input (LVDS)
■ General user input/output (I/O)
■ One eight-position dual in-line package (DIP) switch for each FPGA
■ 16 user LEDs for each FPGA
■ Three user push buttons for each FPGA
■ Communication interfaces
■ One PCI Express x16 edge connector to PLX PE8747 Gen3 Switch
■ One PCI Express Gen3 x8 branch to each FPGA
■ One FMC connector (FPGA1)
■ One HSMC port (FPGA2)
■ One USB 2.0 on-board USB-Blaster II cable
■ Power
■ 12-16 V (laptop) DC input
■ PCI Express edge connector
■ 2x4 PCI Express ATX connector
■ System Monitoring
■ Power—voltage, current, wattage
■ Temperature—FPGA die, local board
■ Mechanical
■ PCI Express full-length form factor
■ PCI Express chassis or bench-top operation