Altera Stratix V Advanced Systems Development Board - Manual (Page 57)

Chapter 2: Board Components 2–47
Memory
January 2014 Altera Corporation Stratix V Advanced Systems Development Board
Reference Manual
F8 DQ51 1.5-V SSTL Class I AW26 T15 Data bus
H3 DQ52 1.5-V SSTL Class I AL25 W14 Data bus
H8 DQ53 1.5-V SSTL Class I AR26 Y17 Data bus
G2 DQ54 1.5-V SSTL Class I AT27 V16 Data bus
H7 DQ55 1.5-V SSTL Class I AM26 W17 Data bus
D7 DQ56 1.5-V SSTL Class I BD29 C15 Data bus
C3 DQ57 1.5-V SSTL Class I BB27 B13 Data bus
C8 DQ58 1.5-V SSTL Class I BB29 D14 Data bus
C2 DQ59 1.5-V SSTL Class I AW29 B14 Data bus
A7 DQ60 1.5-V SSTL Class I AY28 E14 Data bus
A2 DQ61 1.5-V SSTL Class I AW27 A14 Data bus
B8 DQ62 1.5-V SSTL Class I BA28 F14 Data bus
A3 DQ63 1.5-V SSTL Class I AY27 A13 Data bus
F3 DQS_P0
Differential 1.5-V
SSTL Class I
AY30 D21 Data strobe
G3 DQS_N0
Differential 1.5-V
SSTL Class I
BA29 D20 Data strobe
C7 DQS_P1
Differential 1.5-V
SSTL Class I
AJ25 H21 Data strobe
B7 DQS_N1
Differential 1.5-V
SSTL Class I
AJ26 H20 Data strobe
F3 DQS_P2
Differential 1.5-V
SSTL Class I
AL30 V21 Data strobe
G3 DQS_N2
Differential 1.5-V
SSTL Class I
AL31 V20 Data strobe
C7 DQS_P3
Differential 1.5-V
SSTL Class I
AE27 T20 Data strobe
B7 DQS_N3
Differential 1.5-V
SSTL Class I
AE28 T19 Data strobe
F3 DQS_P4
Differential 1.5-V
SSTL Class I
AR27 L15 Data strobe
G3 DQS_N4
Differential 1.5-V
SSTL Class I
AR28 K14 Data strobe
C7 DQS_P5
Differential 1.5-V
SSTL Class I
AK30 V17 Data strobe
B7 DQS_N5
Differential 1.5-V
SSTL Class I
AL29 U17 Data strobe
F3 DQS_P6
Differential 1.5-V
SSTL Class I
AT26 Y16 Data strobe
G3 DQS_N6
Differential 1.5-V
SSTL Class I
AU26 W16 Data strobe
C7 DQS_P7
Differential 1.5-V
SSTL Class I
BC28 E15 Data strobe
Table 2–23. FPGA1 DDR3 Devices Pin Assignments, Schematic Signal Names, and Functions (Part 6 of 7)
Board
Reference
Schematic
Signal Name
I/O Standard Stratix V GX FPGA1 Device Pin Number Description