Altera Quartus II Scripting User Manual
Page 58

2–32
Chapter 2: Command-line Executables
quartus_eda
Quartus II Scripting Reference Manual
© July 2013
Altera Corporation
Simulation Tool as shown in GUI
Command-line Options
Tool: ModelSim Format: VHDL
--simulation --tool=modelsim --format=vhdl
Tool: ModelSim Format: Verilog
--simulation --tool=modelsim --format=verilog
Tool: ModelSim-Altera Format: VHDL
--simulation --tool=modelsim_oem --format=vhdl
Tool: ModelSim-Altera Format: Verilog
--simulation --tool=modelsim_oem --format=verilog
Tool: NC-VHDL Format: VHDL
--simulation --tool=ncsim --format=vhdl
Tool: NC-Verilog Format: Verilog
--simulation --tool=ncsim --format=verilog
Tool: VCS-MX
--simulation --tool=vcsmx
Tool: VCS
--simulation --tool=vcs
Tool: Verilog-XL
--simulation --tool=verilogxl
Tool: Active-HDL
--simulation --tool=activehdl
Tool: Riviera-PRO
--simulation --tool=rivierapro
Timing Analysis Tool as shown in GUI
Command-line Options
Tool: PrimeTime Format: Verilog
--timing_analysis --tool=primetime --format=verilog
Board Level Symbol Tool as shown in GUI
Command-line Options
Tool: Symbol Generation (ViewDraw)
--board_symbol --tool=viewdraw
Board Level Timing Analysis Tool as shown in GUI
Command-line Options
Tool: Stamp Generation Format: STAMP
--board_timing --format=stamp
Board Level Signal Integrity Tool as shown in GUI
Command-line Options
Tool: IBIS Generation Format: IBIS
--board_signal_integrity --format=ibis
Tool: HSPICE Generation Format: HSPICE
--board_signal_integrity --format=hspice
Resynthesis Tool as shown in GUI
Command-line Options
Tool: Blast FPGA
--resynthesis --tool=blast_fpga
Tool: Amplify
--resynthesis --tool=amplify
Tool: Precision Physical
--resynthesis --tool=precision
Formal Verification Tool as shown in GUI
Command-line Options
Tool: Conformal LEC
--formal_verification --tool=conformal