Altera Quartus II Scripting - Manual (Page 468)

3–338 Chapter 3: Tcl Packages & Commands
sdc_ext
Quartus II Scripting Reference Manual © July 2013 Altera Corporation
set_max_skew
Usage
set_max_skew [-exclude ] [-fall_from_clock ] [-fall_to_clock ]
[-from ] [-from_clock ] [-include ] [-rise_from_clock ]
[-rise_to_clock ] [-through ] [-to ] [-to_clock ]
Options
-exclude : A Tcl list of parameters to exclude during skew analysis. This list
can include 1 or more of the following: utsu, uth, utco, from_clock, to_clock,
clock_uncertainty, input_delay, output_delay
-fall_from_clock : Valid source clocks (string patterns are matched using Tcl
string matching)
-fall_to_clock : Valid destination clocks (string patterns are matched using Tcl
string matching)
-from : Valid sources (string patterns are matched using Tcl string matching)
-from_clock : Valid source clocks (string patterns are matched using Tcl string
matching)
-include : Tcl list of parameters to include during skew analysis. This list
can include 1 or more of the following: utsu, uth, utco, from_clock, to_clock,
clock_uncertainty, input_delay, output_delay
-rise_from_clock : Valid source clocks (string patterns are matched using Tcl
string matching)
-rise_to_clock : Valid destination clocks (string patterns are matched using Tcl
string matching)
-through : Valid through nodes (string patterns are matched using Tcl string
matching)
-to : Valid destinations (string patterns are matched using Tcl string matching)
-to_clock : Valid destination clocks (string patterns are matched using Tcl
string matching)
: Required skew
Description
Use the set_max_skew constraint to perform maximum allowable skew analysis between sets of registers
or ports. In order to constrain skew across multiple paths, all such paths must be defined within a single
set_max_skew constraint. set_max_skew timing constraint is not affected by set_max_delay,
set_min_delay and set_multicycle_path but it does obey set_false_path and set_clock_groups.
Legal values for the -from and -to options are collections of clocks, registers, ports, pins, nets, cells or
partitions in a design.
Applying maximum skew constraints between clocks applies the constraint from all register or ports
driven by the clock specified with the -from option to all registers or ports driven by the clock specified
with the -to option.
If pin names or collections are used, the -from value must be a clock pin and the -to value must be any
non-clock input pin to a register. Assignments from clock pins or to and from cells apply to all registers
contained in the cell or driven by the clock pin. Similarly, -to and -from partition specifications apply to all
registers in the specified partition.