Bios enumeration issues, Bios enumeration issues -3 – Altera Arria 10 Avalon-MM User Manual
Page 203
BIOS Enumeration Issues
Both FPGA programming (configuration) and the initialization of a PCIe link require time. Potentially,
an Altera FPGA including a Hard IP block for PCI Express may not be ready when the OS/BIOS begins
enumeration of the device tree. If the FPGA is not fully programmed when the OS/BIOS begins its
enumeration, the OS does not include the Hard IP for PCI Express in its device map.
You can use either of the following two methods to eliminate this issue:
• You can perform a soft reset of the system to retain the FPGA programming while forcing the OS/
BIOS to repeat its enumeration.
• You can use CvP to program the device.
UG-01145_avmm
2015.05.14
BIOS Enumeration Issues
15-3
Debugging
Altera Corporation
See also other documents in the category Altera Measuring instruments:
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