ADLINK aTCA-N700 - Manual (Page 50)

aTCA-N700 HW Users Guide
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P2041 supports 2x USB compliant to USB specification Rev 2.0. On the board, USB2
is routed to the faceplate USB connector. USB1 is not used.
8.1.11. MDC/MDIO Interface
The MDC/MDIO interface is used for the Ethernet PHY BCM54612E and the base
switch BCM54115M management.
The MDC frequency is set by the following relation:
MDC Frequency = core frequency/(MDC_CLK0/1[PHASE] x 2)
8.1.12. GPIO Interface
Table 8-3 shows the connections on the 16 bit GPIO pins.
Table 8-3 GPIO connections
Pin Name Connection I/O Description
GPIO[0:3] SPI_CS[0:3] O SPI Chip select
GPIO[8] UART1_SOUT O UART1_SOUT
GPIO[9] UART2_SOUT O UART2_SOUT
GPIO[10] UART1_SIN I UART1_SIN
GPIO[11] UART2_SIN I UART2_SIN
GPIO[12] DIAG_EN O DIAG_EN
GPIO[13] Connected to CPLD I Reserved
GPIO[14] Connected to CPLD I Reserved
GPIO[15] SPI Write Protect O SPI Write Protect
0 : Write Protect
1 : Normal
GPIO[16] Connected to CPLD I/O Reserved
GPIO[17] Connected to CPLD I/O Reserved
GPIO[18] IIC_4 SCL for RTM I/O RTM I2C
GPIO[19] IIC_4 SDA for I/O RTM I2C
8.2. Ethernet Controller Interface
The interconnections between Ethernet capable devices (Tri-speed) are routed by the
7-port base Ethernet switch, BCM53115M. To support different types of the physical
layer interfaces, some connections require PHY devices as can be seen in Figure 8-9.
Two different types of Ethernet PHY devices are used: two BCM54612Es and one
BCM5221. The BCM54612E connecting to the RJ-45 enables Energy Efficient
Ethernet (EEE) IEEE P802.3az draft standard
compliant operation on the port which
saves power during idle period. The two backplane Base Interface ports are directly
support from the switch in TDI types. One port from BCM5221 is for Serial-over-LAN
(SOL) interface for IPMC. The switch configuration from the LMP is done through the
SPI interface. Note that the two NIC interfaces from the LMP are EC_1 for a base
switch connection and EC_2 for the faceplate RJ-45 connection.
Figure 8-9 Ethernet Control Plane Interconnections